Saturday, February 06, 2016
Search
  
Submit your own News for
inclusion in our Site.
Click here...
Breaking News
Samsung Loses Memory-Chip patent Trial Against Nvidia
Twitter Suspends Accounts To Combat Extremism
Apple Error Message Killing iPhones After Replacing Displays
Mozilla Pulls The Plug On Firefox Smartphone OS
CDs Remain Popular In Japan
768 Gbit Micron 3D NAND Is Faster Than Samsung’s 256Gb V-NAND: ISSCC
Apple Dominated The Smart Watch Market In 2015
Sharp Close To Get Under Foxconn's Wings Following Friday Meeting
Active Discussions
Which of these DVD media are the best, most durable?
How to back up a PS2 DL game
Copy a protected DVD?
roxio issues with xp pro
How to burn a backup copy of The Frozen Throne
Help make DVDInfoPro better with dvdinfomantis!!!
Copied dvd's say blank in computer only
menu making
 Home > News > PC Parts > Elpida ...
Last 7 Days News : SU MO TU WE TH FR SA All News

Tuesday, January 18, 2005
Elpida Integrates Error Correction Circuit in DRAM


Elpida Memory, Inc has developed SSR (Super Self Refresh) technology which achieves a reduction in DRAM's self refresh current to about 1/60 that of the company's conventional product.

The company has also developed a 256-Mbit DDR synchronous DRAM (SDRAM) product, the EDD2516KCTA, using this technology. Elpida said this chip achieves the lowest self refresh current in the DDR SDRAM industry.

In an effort to reduce self refresh current, Elpida broadly extended the conventional model's internal refresh interval. When extending the refresh interval in the conventional DRAM, charge in capacitors becomes lost during the longer interval, and therefore causes imprecise readings. However, Elpida discovered that data only becomes garbled within some memory cells, which have a poor ability to preserve charge. The company accordingly integrated an error correction circuit in a DRAM device so that it could correct the data that becomes garbled under a longer refresh interval.

The EDD2516KCTA's data rate complies with DDR400. In other words, the maximum data rate per pin is 400Mbps. The company expects it to be used in applications such as car navigation systems, PDAs and Flash EEPROM discs. Its self refresh current (IDD6) is as low as 40m?A at 25 degrees, 150m?A at 70 degrees and 250muA at 85 degrees, compared to a large 3mA required by the conventional product (DDR SDRAM) at 0-70 degrees.

Production of the EDD2516KCTA uses 110nm CMOS process technology. The company has already started sample shipments, with volume production slated to start in March 2005. A 512Mb product, an MCP of this 256Mb chip, is also available.

From NE Asia Online



Previous
Next
Datawrite Media - CDRinfo's Tests        All News        HP rolls out Itanium 2 servers
AMD Reports Fourth Quarter and Annual Results     PC Parts News      AMD Announces Turion Processor

Source Link Get RSS feed Easy Print E-Mail this Message

Related News
18nm DRAM Coming Next Year
Samsung Maintains Highest DRAM Market Share in Q2
Intel Labs Showcase Low-energy DRAM Memory
Kingston Leads the DRAM Module Industry: TrendForce
Elpida Memory Becomes Micron Memory Japan
Mobile DRAM to Account for 40 Percent of DRAM Revenue in 2014
DRAM Trends For 2014
DRAM Market Reaches Maturity
Micron Acquires Elpida, Enhances Its DRAM Portfolio
Elpida Acquisition To Close This Month
Big Gains Forecast in Quarterly DRAM Selling Proces
DRAM Market Matures, Says IHS

Most Popular News
 
Home | News | All News | Reviews | Articles | Guides | Download | Expert Area | Forum | Site Info
Site best viewed at 1024x768+ - CDRINFO.COM 1998-2016 - All rights reserved -
Privacy policy - Contact Us .